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| HD74ACT161/HD74ACT163 Synchronous Presettable Binary Counter Description The HD74ACT161 and HD74ACT163 are high-speed synchronous modulo-16 binary counters. They are synchronously presettable for application in programmable dividers and have two types of Count Enable inputs plus a Terminal Count output for versatility in forming synchronous multistage counters. The HD74ACT161 have an asynchronous Master Reset input that overrides all other inputs and forces the outputs Low. The HD74ACT163 has a Synchronous Reset input that overrides counting and parallel loading and allows the outputs to be simultaneously reset on the rising edge of the clock. Features * * * * * Synchronous Counting and Loading High-Speed Synchronous Expansion Typical Count Rate of 125 MHz Outputs Source/Sink 24 mA HD74ACT161 and HD74ACT163 have TTL-Compatible Inputs HD74ACT161/HD74ACT163 Pin Arrangement *R 1 CP 2 P0 3 P1 4 P2 5 P3 6 CEP 7 GND 8 (Top view) 16 VCC 15 TC 14 Q0 13 Q1 12 Q2 11 Q3 10 CET 9 PE Logic Symbol PE P0 P1 P2 P3 CEP CET CP *R Q0 Q1 Q2 Q3 * * MR for HD74ACT161 * SR for HD74AC163/HD74ACT163 TC 2 HD74ACT161/HD74ACT163 Pin Names CEP CET CP MR (HD74ACT161) SR (HD74ACT163/HD74ACT163) P 0 to P3 PE Q0 to Q3 TC Count Enable Parallel Input Count Enable Trickle Input Clock Pulse Input Asynchronous Master Reset Input Synchronous Reset Input Parallel Data Inputs Parallel Enable Input Flip-Flop Outputs Terminal Count Output Functional Description The HD74ACT161 and HD74ACT163 count in modulo-16 binary sequence. From state 15 (HHHH) they increment to state 0 (LLLL). The clock inputs of all flip-flops are driven in parallel through a clock buffer. Thus all changes of the Q outputs (except due to Master Reset of the HD74ACT161) occur as a reset of, and synchronous with, the Low-to-High transition of the CP input signal. The circuits have four fundamental modes of operation, in order of precedence: asynchronous reset (HD74ACT161), synchronous reset (HD74ACT163), parallel load, countup and hold. Five control inputs - Master Reste (MR, HD74ACT161), Synchronous Reset (SR, HD74ACT163), Parallel Enable (PE), Count Enable Parallel (CEP) and Count Enable Trickle (CET) - determine the mode of operation, as shown in the Mode Select Table. A Low signal on MR overrides all other inputs and asynchronously forces all outputs Low. A Low signal on SR overrides counting and parallel loading and allows all outputs to go Low on the next rising edge of CP. A Low signal on PE overrides counting and allows information on the Parallel Data (Pn) inputs to be loaded into the flip-flops on the next rising edge of CP. With PE and MR (HD74ACT161) or SR (HD74ACT163) High, CEP and CET permit counting when both are High. Conversely, a Low signal on either CEP or CET inhibits counting. The HD74ACT161 and HD74ACT163 use D-type edge-triggered flip-flops and changing the SR, PE, CEP and CET inputs when the CP is in either state does not cause errors, provided that the recommended setup and hold times, with respect to the rising edge of CP, are observed. The Terminal Count (TC) output is High when CET is High and counter is in state 15. To implement synchronous multistage counters, the TC outputs can be used with the CEP and CET inputs in two different ways. The TC output is subject to decoding spikes due to internal race conditions and is therefore not recommended for use as a clock or asynchronous reset for flip-flops, counters or registers. Logic Equations: Count Enable = CEP*CET*PE TC = Q 0*Q1*Q2*Q3*CET 3 HD74ACT161/HD74ACT163 Mode Select Table SR* 1 L H H H H Note: PE X L H H H CET X X H L X CEP X X H X L Action on the Rising Clock Edge ( Reset (Clear) Load (Pn Qn) Count (Increment) No change (Hold) No change (Hold) ) 1. For HD74AC163/HD74ACT163 H : High Voltage Level L : Low Voltage Level X : Immaterial State Diagram 0 1 2 3 4 15 5 14 6 13 7 12 11 10 9 8 4 HD74ACT161/HD74ACT163 Block Diagram P0 PE '161 '163 CEP CET '163 ONRY TC P1 P2 P3 CP CP '161 ONRY CP D CP D CD O O Q0 Q0 DETAIL A DETAIL A DETAIL A DETAIL A MR '161 SR '163 Q0 Q1 Q2 Q3 Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. DC Characteristics (unless otherwise specified) Item Maximum quiescent supply current Maximum quiescent supply current Maximum additional ICC/input (HD74ACT161/HD74ACT163) Symbol I CC I CC I CCT Max 80 8.0 1.5 Unit A A mA Condition VIN = VCC or ground, VCC = 5.5 V, Ta = Worst case VIN = VCC or ground, VCC = 5.5 V, Ta = 25C VIN = VCC - 2.1 V, VCC = 5.5 V, Ta = Worst case 5 HD74ACT161/HD74ACT163 AC Characteristics: HD74ACT161 Ta = +25C CL = 50 pF Item Maximum count frequency Propagation delay CP to Qn (PE Input HIGH or LOW) Propagation delay CP to Qn (PE Input HIGH or LOW) Propagation delay CP to TC Propagation delay CP to TC Propagation delay CET to TC Propagation delay CET to TC Propagation delay MR to Q n Propagation delay MR to TC Note: Symbol f max t PLH VCC (V)*1 5.0 5.0 Min 115 1.0 Typ 125 5.5 Max -- 9.5 Ta = -40C to +85C CL = 50 pF Min 100 1.0 Max -- 10.5 Unit MHz ns t PLH 5.0 1.0 6.0 10.5 1.0 11.5 ns t PLH t PHL t PLH t PHL t PHL t PHL 5.0 5.0 5.0 5.0 5.0 5.0 1.0 1.0 1.0 1.0 1.0 1.0 7.0 8.0 5.5 6.0 6.0 8.0 11.0 12.5 8.5 9.5 10.0 13.5 1.0 1.0 1.0 1.0 1.0 1.0 12.5 13.5 10.0 10.5 11.0 14.5 ns ns ns ns ns ns 1. Voltage Range 5.0 is 5.0 V 0.5 V 6 HD74ACT161/HD74ACT163 AC Operating Requirements: HD74ACT161 Ta = +25C CL = 50 pF Item Set-up time, HIGH or LOW Pn to CP Hold time, HIGH or LOW Pn to CP Setup time, HIGH or LOW MR to CP Hold time, HIGH or LOW MR to CP Setup time, HIGH or LOW PE to CP Hold time, HIGH or LOW PE to CP Setup time, HIGH or LOW CEP or CET to CP Hold time, HIGH or LOW CEP or CET to CP Clock pulse width (Load) HIGH or LOW Clock pulse width (Count) HIGH or LOW MR pulse width, LOW Recovery time MR to CP Note: Symbol t su th t su th t su th t su th tw tw tw t rec VCC (V)*1 Typ 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 4.0 -5.0 4.0 -5.5 4.0 -5.5 2.5 -3.0 2.0 2.0 3.0 0 Ta = -40C to +85C CL = 50 pF Guaranteed Minimum 9.5 0 8.5 -0.5 8.5 -0.5 5.5 0 3.0 3.0 3.0 0 11.5 0 9.5 -0.5 9.5 -0.5 6.5 0 3.5 3.5 7.5 0.5 Unit ns ns ns ns ns ns ns ns ns ns ns ns 1. Voltage Range 5.0 is 5.0 V 0.5 V Capacitance Item Input capacitance Power dissipation capacitance Symbol CIN CPD Typ 4.5 45.0 Unit pF pF Condition VCC = 5.5 V VCC = 5.0 V 7 HD74ACT161/HD74ACT163 AC Characteristics: HD74ACT163 Ta = +25C CL = 50 pF Item Maximum count frequency Propagation delay CP to Qn (PE Input HIGH or LOW) Propagation delay CP to Qn (PE Input HIGH or LOW) Propagation delay CP to TC Propagation delay CP to TC Propagation delay CET to TC Propagation delay CET to TC Note: Symbol f max t PLH VCC (V)*1 5.0 5.0 Min 120 1.0 Typ 128 5.5 Max -- 10.0 Ta = -40C to +85C CL = 50 pF Min 105 1.0 Max -- 11.0 Unit MHz ns t PHL 5.0 1.0 6.0 11.0 1.0 12.0 ns t PLH t PHL t PLH t PHL 5.0 5.0 5.0 5.0 1.0 1.0 1.0 1.0 7.0 8.0 5.5 6.0 11.5 13.5 9.0 10.0 1.0 1.0 1.0 1.0 13.5 15.0 10.5 11.0 ns ns ns ns 1. Voltage Range 5.0 is 5.0 V 0.5 V 8 HD74ACT161/HD74ACT163 AC Operating Requirements: HD74ACT163 Ta = +25C CL = 50 pF Item Set-up time, HIGH or LOW Pn to CP Hold time, HIGH or LOW Pn to CP Setup time, HIGH or LOW SR to CP Hold time, HIGH or LOW SR to CP Setup time, HIGH or LOW PE to CP Hold time, HIGH or LOW PE to CP Setup time, HIGH or LOW CEP or CET to CP Hold time, HIGH or LOW CEP or CET to CP Clock pulse width (Load) HIGH or LOW Clock pulse width (Count) HIGH or LOW Note: Symbol t su th t su th t su th t su th tw tw VCC (V)*1 Typ 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 4.0 -5.0 4.0 -5.5 4.0 -5.5 2.5 -3.0 2.0 2.0 Ta = -40C to +85C CL = 50 pF Guaranteed Minimum 10.0 0.5 10.0 -0.5 8.5 -0.5 5.5 0 3.5 3.5 12.0 0.5 11.5 -0.5 10.5 0 6.5 0.5 3.5 3.5 Unit ns ns ns ns ns ns ns ns ns ns 1. Voltage Range 5.0 is 5.0 V 0.5 V Capacitance Item Input capacitance Power dissipation capacitance Symbol CIN CPD Typ 4.5 45.0 Unit pF pF Condition VCC = 5.5 V VCC = 5.0 V 9 19.20 20.00 Max 16 9 7.40 Max 6.30 Unit: mm 1 1.3 1.11 Max 8 0.51 Min 2.54 Min 5.06 Max 7.62 2.54 0.25 0.48 0.10 0.25 - 0.05 0 - 15 Hitachi Code JEDEC EIAJ Weight (reference value) + 0.13 DP-16 Conforms Conforms 1.07 g Unit: mm 10.06 10.5 Max 16 9 5.5 1 *0.22 0.05 0.20 0.04 8 0.80 Max 2.20 Max 0.20 7.80 + 0.30 - 1.15 0 - 8 0.70 0.20 1.27 *0.42 0.08 0.40 0.06 0.12 M Hitachi Code JEDEC EIAJ Weight (reference value) FP-16DA -- Conforms 0.24 g *Dimension including the plating thickness Base material dimension 0.10 0.10 0.15 Unit: mm 9.9 10.3 Max 16 9 3.95 1 1.27 0.635 Max 8 0.11 0.14 + 0.04 - 1.75 Max *0.22 0.03 0.20 0.03 0.10 6.10 + 0.30 - 1.08 0 - 8 0.67 0.60 + 0.20 - *0.42 0.08 0.40 0.06 0.15 0.25 M *Dimension including the plating thickness Base material dimension Hitachi Code JEDEC EIAJ Weight (reference value) FP-16DN Conforms Conforms 0.15 g Unit: mm 5.00 5.30 Max 16 9 4.40 1 0.08 *0.22 + 0.07 - 8 0.65 1.0 6.40 0.20 0 - 8 0.50 0.10 0.20 0.06 0.13 M 0.65 Max *0.17 0.05 0.15 0.04 1.10 Max 0.10 0.07 +0.03 -0.04 *Dimension including the plating thickness Base material dimension Hitachi Code JEDEC EIAJ Weight (reference value) TTP-16DA -- -- 0.05 g Cautions 1. Hitachi neither warrants nor grants licenses of any rights of Hitachi's or any third party's patent, copyright, trademark, or other intellectual property rights for information contained in this document. Hitachi bears no responsibility for problems that may arise with third party's rights, including intellectual property rights, in connection with use of the information contained in this document. 2. Products and product specifications may be subject to change without notice. Confirm that you have received the latest product standards or specifications before final design, purchase or use. 3. Hitachi makes every attempt to ensure that its products are of high quality and reliability. However, contact Hitachi's sales office before using the product in an application that demands especially high quality and reliability or where its failure or malfunction may directly threaten human life or cause risk of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation, traffic, safety equipment or medical equipment for life support. 4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly for maximum rating, operating supply voltage range, heat radiation characteristics, installation conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable failure rates or failure modes in semiconductor devices and employ systemic measures such as failsafes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other consequential damage due to operation of the Hitachi product. 5. This product is not designed to be radiation resistant. 6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without written approval from Hitachi. 7. Contact Hitachi's sales office for any questions regarding this document or Hitachi semiconductor products. Hitachi, Ltd. Semiconductor & Integrated Circuits. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Tel: Tokyo (03) 3270-2111 Fax: (03) 3270-5109 URL NorthAmerica : http:semiconductor.hitachi.com/ Europe : http://www.hitachi-eu.com/hel/ecg Asia (Singapore) : http://www.has.hitachi.com.sg/grp3/sicd/index.htm Asia (Taiwan) : http://www.hitachi.com.tw/E/Product/SICD_Frame.htm Asia (HongKong) : http://www.hitachi.com.hk/eng/bo/grp3/index.htm Japan : http://www.hitachi.co.jp/Sicd/indx.htm For further information write to: Hitachi Semiconductor (America) Inc. 179 East Tasman Drive, San Jose,CA 95134 Tel: <1> (408) 433-1990 Fax: <1>(408) 433-0223 Hitachi Europe GmbH Electronic components Group Dornacher Strae 3 D-85622 Feldkirchen, Munich Germany Tel: <49> (89) 9 9180-0 Fax: <49> (89) 9 29 30 00 Hitachi Europe Ltd. Electronic Components Group. Whitebrook Park Lower Cookham Road Maidenhead Berkshire SL6 8YA, United Kingdom Tel: <44> (1628) 585000 Fax: <44> (1628) 778322 Hitachi Asia Pte. Ltd. 16 Collyer Quay #20-00 Hitachi Tower Singapore 049318 Tel: 535-2100 Fax: 535-1533 Hitachi Asia Ltd. Taipei Branch Office 3F, Hung Kuo Building. No.167, Tun-Hwa North Road, Taipei (105) Tel: <886> (2) 2718-3666 Fax: <886> (2) 2718-8180 Hitachi Asia (Hong Kong) Ltd. Group III (Electronic Components) 7/F., North Tower, World Finance Centre, Harbour City, Canton Road, Tsim Sha Tsui, Kowloon, Hong Kong Tel: <852> (2) 735 9218 Fax: <852> (2) 730 0281 Telex: 40815 HITEC HX Copyright ' Hitachi, Ltd., 1999. All rights reserved. Printed in Japan. |
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